1. Field of the Invention
The present invention relates to a technique for bonding two pieces of substrates to each other, for example, to a technique to realize a bonded wafer having an SOI (silicon on insulator) structure, in which two pieces of silicon mirror wafers are joined through an oxide film without an adhesive and thereafter one of the bonded wafer pieces is thinned, to a technique for directly bonding semiconductor substrates to each other through no oxide film, and the like.
2. Description of Related Art
Particularly, in a technique for a semiconductor substrate having an SOI structure, one manufactured by the so-called SIMOX (separation by implanted oxygen) method in which oxygen ions are heavily implanted into a silicon single crystal and thereafter a heat treatment is carried out to form an oxide film, has been watched as a superior SOI wafer and researches therefor have been prosecuted. The SIMOX method is excellent in uniformity of the thickness of the thin SOI layer because the thickness of the SOI layer to form an active region for a device can be determined by the accelerating voltage at the time of the implantation of oxygen ions. However, in the method, there are a lot of problems, for example, about the reliability of the oxide film, the necessity of a heat treatment at a temperature not less than 1,300.degree. C. in order to recover the crystallinity of a silicon layer which was changed to an amorphous state, and the like.
A type of bonded wafer manufactured by bonding two pieces of silicon wafers with mirror finished surfaces to each other has been watched as another wafer having an SOI structure. The method therefor will be explained as follows.
When the mirror surfaces of the two pieces of silicon wafers are brought contactwith each other under a clean condition, after forming an oxide film on the mirror surface of at least one of the two pieces of silicon wafers, these wafer pieces are joined to each other through the oxide film without an adhesive (hereinafter, this state may be referred to as the "joining"). Because such a joining state is not a perfect one, a heat treatment is then carried out to the joined wafer pieces to firmly bonded with each other (hereinafter, this state may be referred to as the "bonding"). Thereafter, the one (hereinafter, the surface thereof may be referred to as the "main surfacer") of the bonded wafer pieces in the side in which an active region for a device will be formed is thinned by wet etching or by grinding, and then the thinned surface is polished. Thus, a bonded wafer with a thinned SOI layer is obtained. In this case, it is required that the silicon layer in the side to be thinned comprises a single crystal.
Because such a bonded wafer requires no interposition of foreign material such as an adhesive between the wafer pieces, the bonded wafer provides the advantages that subsequent high temperature heat treatments or various types of chemical treatments can be freely performed and a dielectric layer can be easily buried therein. Recently, in cooperation with improvement of thin film technology, e.g., improvement of flatness, cleanliness or the like, the technique for manufacturing a bonded wafer has come to attract special attention.
The SOI layer of a bonded wafer tends to become the thinner by the requirement of larger scale integration and of higher speed of semiconductor devices. Recently, a bonded wafer having an extremely thin SOI layer, e.g., of not more than 1 .mu.m, has been required. In such a bonded wafer, uniformity of the thickness of the thinned SOI layer or processing accuracy thereof is a problem.
For example, in order to achieve the thickness of the SOI layer which is equal to or less than that of SIMOX, for a future complementary MOS substrate, it is required to realize an average thickness of the SOI layer not larger than 0.1 .mu.m and a processing accuracy of thickness being within at least .+-.0.01 .mu.m. It is preferable that the SOI layer thickness distribution after thinning has a standard deviation not larger than 2 nm, when comparing it with that of the SOI layer of the existing SIMOX wafer. However, a conventional bonded wafer has a limit of the processing accuracy of the SOI layer thickness, which is about .+-.0.03 .mu.m for an average thickness of SOI layer of 1 .mu.m. Herein, the processing accuracy of thickness is considered to correspond to three times the standard deviation value.
Recently, a method in which the layer thicknesses of an SOI wafer are measured at a plurality of points and the SOI layer can be thinned to about 0.1 .mu.m on the basis of the obtained layer thickness distribution, has been developed. However, according to the method, it is considerably difficult to stably obtain a satisfactory processing accuracy of thickness, for example, an SOI layer thickness distribution having a standard deviation not larger than 2 nm.
The present inventors have studied and examined various measures to overcome the limit. As a result, it has been found that the limit is due to the finish processing accuracy of the mirror surfaces of a wafer prior to bonding and due to the processing accuracy in the previous step prior to the step for working the SOI layer to have a thickness of 0.1 .mu.m.
That is, it has been found that the thickness distribution of the SOI layer of the bonded wafer which was thinned to 0.1 .mu.m by a method with a conventional processing accuracy, is very similar to the distribution of small irregularities (hereinafter, referred to as the "peels") which is detected in an observation of a general mirror wafer surface through a magic mirror (an evaluation of a mirror surface by light reflection). It is said that the peels are created by the irregularities on the rear surface of a wafer or the figure of the surface of a polishing plate which is in contact with the rear surface of the wafer, being transferred onto the front surface of the wafer during polishing the wafer. From this matter, it is considered that the thickness irregularity of the thinned layer of the bonded wafer is caused due to being not able to completely remove the peels of the wafer which were created during a polishing step, e.g., the wax-mounting polishing method which is generally used, or the like, and therefore, the thickness distribution of the thinned layer is dependent on the peel distribution of the wafer.
Because the peels are wave-like irregularities having small heights or shallow depths in the range of 0.01-0.1 .mu.m in peak-to-valley value, and a large period in the range of 1-20 mm, such peels cannot be detected by a general measurement device for measuring an LTV (local thickness variation) or a surface roughness. Therefore, in conventional manufacturing processes of an SOI wafer having an SOI layer with a thickness of not less than 1 .mu.m, the existence of the peels did not become an issue because the conventional processing accuracy of the layer thickness was out of the range of .+-.0.3 .mu.m.
Such peels can be observed by using a magic mirror and the size thereof can be measured by a contact probe roughness measurement apparatus.
On the other hand, recently, a measure to counter generation of particles and dust comes to be important in manufacturing processes of semiconductor devices. Therefore, it has been required to suppress generation of dust by polishing the rear surface of the silicon mirror wafer which was not an issue in the past.